Posts
2025
Paper Byte Series: RTL2RTL Formal Equivalence Checking
·548 words·3 mins
Combinational Loops: Digital Design's Forbidden Fruit (and When They're Actually Okay?!)
·875 words·5 mins
Quick intro to reset handling in formal
·552 words·3 mins
Why SVA Matters
·1079 words·6 mins
Cadence Jasper Gold Applications
·907 words·5 mins
Birds eye view of formal verification
·2100 words·10 mins
Embarking on the Formal Verification Journey: What to Expect
·239 words·2 mins